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authorLukas Auer <lukas.auer@aisec.fraunhofer.de>2018-11-22 11:26:23 +0100
committerAndes <uboot@andestech.com>2018-11-26 13:57:31 +0800
commit62a09ad53b7cb18bb47dc3c77155f56b894a6df5 (patch)
tree59c6d9c7311d702417978bf805adff541856376e /arch/riscv/include
parentc93a1c8185e64b9571df9f7fe2c33f26cd3c41d7 (diff)
riscv: implement the invalidate_icache_* functions
Implement the functions invalidate_icache_range() and invalidate_icache_all(). RISC-V does not have instructions for explicit cache-control. The functions in this patch are implemented with the memory ordering instruction for synchronizing the instruction and data streams. This may be implemented as a cache flush or invalidate on simple processors, others may only invalidate the relevant cache lines. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'arch/riscv/include')
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