diff options
| author | Atish Patra <atish.patra@wdc.com> | 2020-04-21 11:15:01 -0700 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-04-23 10:14:16 +0800 |
| commit | d4ea649f179a69edd2cf2dd96efb9337205eb015 (patch) | |
| tree | 42bd3450a19f02aafa85e7c4fff2d3fdadcc903c /arch/riscv/lib/asm-offsets.c | |
| parent | f614753c4b91bc3b56809773aeb17da10f1231a5 (diff) | |
riscv: Provide a mechanism to fix DT for reserved memory
In RISC-V, M-mode software can reserve physical memory regions
by setting appropriate physical memory protection (PMP) csr. As the
PMP csr are accessible only in M-mode, S-mode U-Boot can not read
this configuration directly. However, M-mode software can pass this
information via reserved-memory node in device tree so that S-mode
software can access this information.
This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv/lib/asm-offsets.c')
| -rw-r--r-- | arch/riscv/lib/asm-offsets.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c index 4fa4fd3714..7301c1b98e 100644 --- a/arch/riscv/lib/asm-offsets.c +++ b/arch/riscv/lib/asm-offsets.c @@ -14,6 +14,7 @@ int main(void) { DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart)); + DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, arch.firmware_fdt_addr)); #ifndef CONFIG_XIP DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts)); #endif |