summaryrefslogtreecommitdiff
path: root/arch/riscv/lib/spl.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2020-08-25 08:18:50 -0400
committerTom Rini <trini@konsulko.com>2020-08-25 08:18:50 -0400
commit078656186f1037894c45682ca74d0921de8a7010 (patch)
tree20a323869e7d79f9da8996259066c7446beb292a /arch/riscv/lib/spl.c
parent8ee3a24fdc237c76cead618a173740594287dd96 (diff)
parentc92b50a44b95e706b9c0c97544bd7504fe6d36e9 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Sipeed Maix support S-mode. - Provide command sbi. - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address. - Fix a compiler error with CONFIG_SPL_SMP=n. - Fix sifive ram driver 32 compiler warnings. - Fix kendryte/pll.h redefine nop() warning.
Diffstat (limited to 'arch/riscv/lib/spl.c')
-rw-r--r--arch/riscv/lib/spl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
index e24ec5a46c..5e19d0f36a 100644
--- a/arch/riscv/lib/spl.c
+++ b/arch/riscv/lib/spl.c
@@ -39,7 +39,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
typedef void __noreturn (*image_entry_riscv_t)(ulong hart, void *dtb);
void *fdt_blob;
- int ret;
+ __maybe_unused int ret;
#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
fdt_blob = spl_image->fdt_addr;