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authorSimon Glass <sjg@chromium.org>2019-09-25 08:56:42 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-10-08 13:57:48 +0800
commit75d8f49481a5c260d0cf1024d41f0b29d57e0efe (patch)
treef434a546d0cc97e9cad48f59e54902d1307fad24 /arch/sandbox/include
parent594d272cfd3dc43f118efb952676715b0382af24 (diff)
sandbox: pci: Create a new sandbox_pci_read_bar() function
The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/sandbox/include')
-rw-r--r--arch/sandbox/include/asm/test.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 1b21af6bed..cd2b9e3155 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -198,4 +198,19 @@ int sandbox_get_pch_spi_protect(struct udevice *dev);
*/
int sandbox_get_pci_ep_irq_count(struct udevice *dev);
+/**
+ * sandbox_pci_read_bar() - Read the BAR value for a read_config operation
+ *
+ * This is used in PCI emulators to read a base address reset. This has special
+ * rules because when the register is set to 0xffffffff it can be used to
+ * discover the type and size of the BAR.
+ *
+ * @barval: Current value of the BAR
+ * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or
+ * PCI_BASE_ADDRESS_MEM_TYPE_32)
+ * @size: Size of BAR in bytes
+ * @return BAR value to return from emulator
+ */
+uint sandbox_pci_read_bar(u32 barval, int type, uint size);
+
#endif