diff options
| author | Marek Vasut <marex@denx.de> | 2018-05-28 17:22:47 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-07-12 09:22:12 +0200 |
| commit | 07252f6f7e37e23cb43245dcddf8ea8f1d45dec1 (patch) | |
| tree | 566ac0679fce7e37276dac37df487f30d61cae8f /arch/sh/include/asm/cpu_sh7723.h | |
| parent | 93a8ed868583460ab9f3796fdc92f4713bf759a9 (diff) | |
ddr: altera: Add ECC DRAM scrubbing support for Arria10
The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/sh/include/asm/cpu_sh7723.h')
0 files changed, 0 insertions, 0 deletions