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| author | Tom Rini <trini@konsulko.com> | 2020-07-17 08:04:48 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-07-17 08:04:48 -0400 |
| commit | 7c3cc6f106ed1ca13b0ff6eea9f8e1473240aef3 (patch) | |
| tree | 8c67a8ed3ab24b1421161960103d8614cbde659a /arch/x86/Kconfig | |
| parent | 42e7659db0ac7089d3a2f80ee1c3b8eb64d84706 (diff) | |
| parent | d40d2c570600396b54dece16429727ef50cfeef0 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c8eae24c07..27295ef384 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -717,6 +717,7 @@ config HAVE_ITSS config HAVE_P2SB bool "Enable P2SB" + depends on P2SB help Select this to include the driver for the Primary to Sideband Bridge (P2SB) which is found on several Intel |