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| author | Tom Rini <trini@konsulko.com> | 2020-07-17 08:04:48 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-07-17 08:04:48 -0400 |
| commit | 7c3cc6f106ed1ca13b0ff6eea9f8e1473240aef3 (patch) | |
| tree | 8c67a8ed3ab24b1421161960103d8614cbde659a /arch/x86/cpu/baytrail/acpi.c | |
| parent | 42e7659db0ac7089d3a2f80ee1c3b8eb64d84706 (diff) | |
| parent | d40d2c570600396b54dece16429727ef50cfeef0 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes
Diffstat (limited to 'arch/x86/cpu/baytrail/acpi.c')
| -rw-r--r-- | arch/x86/cpu/baytrail/acpi.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 65f2006a0a..07757b88a3 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -139,7 +139,7 @@ void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs, header->checksum = table_compute_checksum(fadt, header->length); } -void acpi_create_gnvs(struct acpi_global_nvs *gnvs) +int acpi_create_gnvs(struct acpi_global_nvs *gnvs) { struct udevice *dev; int ret; @@ -159,9 +159,10 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs) gnvs->iuart_en = 1; else gnvs->iuart_en = 0; + + return 0; } -#ifdef CONFIG_HAVE_ACPI_RESUME /* * The following two routines are called at a very early stage, even before * FSP 2nd phase API fsp_init() is called. Registers off ACPI_BASE_ADDRESS @@ -204,4 +205,3 @@ void chipset_clear_sleep_state(void) pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); outl(pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT); } -#endif |