diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2012-12-03 13:59:00 +0000 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2012-12-06 14:30:43 -0800 |
| commit | 488b8b242b72fe551dc38e33af8c7f94747610bd (patch) | |
| tree | 889cdc73a846b039daba627f50ce6d7b3594320b /arch/x86/cpu/coreboot/sdram.c | |
| parent | 300081aa68d705ce954c516751a9c03efa1fba5e (diff) | |
x86: Fix MTRR clear to detect which MTRR to use
Coreboot was always using MTRR 7 for the write-protect
cache entry that covers the ROM and U-boot was removing it.
However with 4GB configs we need more MTRRs for the BIOS
and so the WP MTRR needs to move. Instead coreboot will
always use the last available MTRR that is normally set
aside for OS use and U-boot can clear it before the OS.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/coreboot/sdram.c')
0 files changed, 0 insertions, 0 deletions