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authorBin Meng <bmeng.cn@gmail.com>2015-06-03 09:20:02 +0800
committerSimon Glass <sjg@chromium.org>2015-06-04 03:03:17 -0600
commit65cdd9be3e0fe79909962bba9bedf7967d44d60b (patch)
tree78ff03b1f82a6e5c5462149487cea13bcfae7606 /arch/x86/cpu/coreboot
parentd04e30b839f3a60b72fda7021eaf2f94b185d756 (diff)
x86: coreboot: Fix cosmetic issues
Clean up arch/x86/cpu/coreboot.c to fix several cosmetic issues. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/coreboot')
-rw-r--r--arch/x86/cpu/coreboot/coreboot.c27
1 files changed, 3 insertions, 24 deletions
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 4cdd0d4035..c3dfd28fff 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -7,16 +7,10 @@
*/
#include <common.h>
-#include <asm/u-boot-x86.h>
-#include <flash.h>
#include <netdev.h>
-#include <ns16550.h>
-#include <asm/msr.h>
-#include <asm/cache.h>
-#include <asm/cpu.h>
#include <asm/io.h>
+#include <asm/msr.h>
#include <asm/mtrr.h>
-#include <asm/arch/tables.h>
#include <asm/arch/sysinfo.h>
#include <asm/arch/timestamp.h>
@@ -53,13 +47,6 @@ int last_stage_init(void)
return 0;
}
-#ifndef CONFIG_SYS_NO_FLASH
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- return 0;
-}
-#endif
-
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
@@ -67,7 +54,8 @@ int board_eth_init(bd_t *bis)
void board_final_cleanup(void)
{
- /* Un-cache the ROM so the kernel has one
+ /*
+ * Un-cache the ROM so the kernel has one
* more MTRR available.
*
* Coreboot should have assigned this to the
@@ -91,15 +79,6 @@ void board_final_cleanup(void)
outb(0xcb, 0xb2);
}
-void panic_puts(const char *str)
-{
- NS16550_t port = (NS16550_t)0x3f8;
-
- NS16550_init(port, 1);
- while (*str)
- NS16550_putc(port, *str++);
-}
-
int misc_init_r(void)
{
return 0;