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authorSimon Glass <sjg@chromium.org>2020-04-30 21:21:43 -0600
committerBin Meng <bmeng.cn@gmail.com>2020-05-04 15:28:28 +0800
commitb4d4f592b243d08791ce582073710444ede48446 (patch)
tree4cb67abd5a0808c6fe20eaba7a8fd9dd3b0b4425 /arch/x86/cpu/coreboot
parentfc486371c3696cf246163fc35e79c740a5d7d1b9 (diff)
x86: coreboot: Allow building an SPL image
Make a few adjustments to allow us to build an SPL image for coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/coreboot')
-rw-r--r--arch/x86/cpu/coreboot/Makefile8
-rw-r--r--arch/x86/cpu/coreboot/coreboot.c3
-rw-r--r--arch/x86/cpu/coreboot/coreboot_spl.c12
3 files changed, 21 insertions, 2 deletions
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 35b15bb1da..605f90304e 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -11,8 +11,14 @@
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
+ifndef CONFIG_SPL
obj-y += car.o
+endif
+ifdef CONFIG_SPL_BUILD
+obj-y += coreboot_spl.o
+else
+obj-y += sdram.o
+endif
obj-y += coreboot.o
obj-y += tables.o
-obj-y += sdram.o
obj-y += timestamp.o
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 0c4c6348d1..624caf67a6 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -27,7 +27,8 @@ int arch_cpu_init(void)
timestamp_init();
- return x86_cpu_init_f();
+ return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() :
+ x86_cpu_init_f();
}
int checkcpu(void)
diff --git a/arch/x86/cpu/coreboot/coreboot_spl.c b/arch/x86/cpu/coreboot/coreboot_spl.c
new file mode 100644
index 0000000000..36661871e9
--- /dev/null
+++ b/arch/x86/cpu/coreboot/coreboot_spl.c
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include <common.h>
+#include <init.h>
+
+int dram_init(void)
+{
+ return 0;
+}