diff options
author | Simon Glass <sjg@chromium.org> | 2019-09-25 08:56:38 -0600 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2019-10-08 13:57:47 +0800 |
commit | 2f0c2f03e71a68d7e5d8770c10d0154ead6dd104 (patch) | |
tree | 7d51fa909ae1de76294342a18c8dcc70e1a3eab1 /arch/x86/cpu/intel_common/cpu.c | |
parent | 55a6b13a75276fbdf7186b34b4ad72238a7ec16b (diff) |
x86: Add common functions for TDP and perf control
These functions are the same on modern Intel CPUs, so use common code to
set them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: return false instead of 0 in cpu_ivybridge_config_tdp_levels();
fix 'muiltiplier' and 'desgn' typos]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/intel_common/cpu.c')
-rw-r--r-- | arch/x86/cpu/intel_common/cpu.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 7d0ed73b4b..1898903853 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -145,3 +145,23 @@ int cpu_configure_thermal_target(struct udevice *dev) return 0; } + +void cpu_set_perf_control(uint clk_ratio) +{ + msr_t perf_ctl; + + perf_ctl.lo = (clk_ratio & 0xff) << 8; + perf_ctl.hi = 0; + msr_write(MSR_IA32_PERF_CTL, perf_ctl); + debug("CPU: frequency set to %d MHz\n", clk_ratio * INTEL_BCLK_MHZ); +} + +bool cpu_config_tdp_levels(void) +{ + msr_t platform_info; + + /* Bits 34:33 indicate how many levels supported */ + platform_info = msr_read(MSR_PLATFORM_INFO); + + return ((platform_info.hi >> 1) & 3) != 0; +} |