diff options
author | Simon Glass <sjg@chromium.org> | 2016-01-17 16:11:13 -0700 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2016-01-24 12:07:19 +0800 |
commit | 858361b174ca44cd3ae3bfd87fcd33bcfeb31188 (patch) | |
tree | c3a00164b097de4f8f1cb9e149397023a4bf194e /arch/x86/cpu/ivybridge/cpu.c | |
parent | fe40bd4d8f62637aac0d2b3e6195d56dc96b1342 (diff) |
x86: ivybridge: Rename bd82x6x_init()
Rename the existing bd82x6x_init() to bd82x6x_init_extra(). We will remove
this in a later patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/ivybridge/cpu.c')
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 1e6f656685..2a15fc0220 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -15,6 +15,7 @@ #include <dm.h> #include <errno.h> #include <fdtdec.h> +#include <pch.h> #include <asm/cpu.h> #include <asm/io.h> #include <asm/lapic.h> @@ -211,6 +212,7 @@ int print_cpuinfo(void) { enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE; char processor_name[CPU_MAX_NAME_LEN]; + struct udevice *dev; const char *name; uint32_t pm1_cnt; uint16_t pm1_sts; @@ -241,6 +243,12 @@ int print_cpuinfo(void) } /* Early chipset init required before RAM init can work */ + ret = uclass_first_device(UCLASS_PCH, &dev); + if (ret) + return ret; + if (!dev) + return -ENODEV; + sandybridge_early_init(SANDYBRIDGE_MOBILE); /* Check PM1_STS[15] to see if we are waking from Sx */ |