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authorSimon Glass <sjg@chromium.org>2014-11-12 22:42:11 -0700
committerSimon Glass <sjg@chromium.org>2014-11-21 07:34:11 +0100
commitd188b18f65417a0a6698c43926e3c66b134195b8 (patch)
tree10ed6a3acef604ebce493a84f633540bd2a5c3c8 /arch/x86/cpu/ivybridge/cpu.c
parent70a09c6c3dc25b200a9d0475afcf5dfc9836b18e (diff)
x86: Refactor PCI to permit alternate init
We want access PCI earlier in the init sequence, so refactor the code so that it does not require use of a BSS variable to work. This will allow us to use early malloc() to store information about a PCI hose. Common PCI code moves to arch/x86/cpu/pci.c and a new board_pci_setup_hose() function is provided by boards to set up the (single) hose used by that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/ivybridge/cpu.c')
0 files changed, 0 insertions, 0 deletions