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authorSimon Glass <sjg@chromium.org>2016-03-11 22:07:11 -0700
committerBin Meng <bmeng.cn@gmail.com>2016-03-17 10:27:25 +0800
commite77b62e2906affb94f442ce7735762883f8147af (patch)
treecccb300e21f32fab3723439a9445b9325d302c4e /arch/x86/cpu/mp_init.c
parent6499277827f5b0ceeb0447805ba4807307de78d2 (diff)
x86: Update microcode for secondary CPUs
Each CPU needs to have its microcode loaded. Add support for this so that all CPUs will have the same version. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/mp_init.c')
-rw-r--r--arch/x86/cpu/mp_init.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 4cc655566c..2604a687ab 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -248,8 +248,10 @@ static int load_sipi_vector(atomic_t **ap_countp, int num_cpus)
if (!stack)
return -ENOMEM;
params->stack_top = (u32)(stack + size);
-
- params->microcode_ptr = 0;
+#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
+ params->microcode_ptr = ucode_base;
+ debug("Microcode at %x\n", params->microcode_ptr);
+#endif
params->msr_table_ptr = (u32)msr_save;
ret = save_bsp_msrs(msr_save, sizeof(msr_save));
if (ret < 0)