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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-07-22 01:21:09 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-28 10:36:24 -0600 |
| commit | abab912813169e9f24e12b9a0a993b0c6060c808 (patch) | |
| tree | 7f578d1fe98aca74dee812131ab44156028d0820 /arch/x86/cpu/qemu | |
| parent | a2771943415c41b7a730e89e8eba9a43a4fa3fad (diff) | |
x86: mpspec: Allow platform to determine how PIRQ is connected to I/O APIC
Currently during writing MP table I/O interrupt assignment entry, we
assume the PIRQ is directly mapped to I/O APIC INTPIN#16-23, which
however is not always the case on some platforms.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/qemu')
0 files changed, 0 insertions, 0 deletions