diff options
| author | Felipe Balbi <felipe.balbi@linux.intel.com> | 2017-07-06 14:41:52 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-07-30 10:30:25 +0800 |
| commit | e71de54a4943ac481e8bcdb0a132c52ab90f23fe (patch) | |
| tree | 909d9ffc7890c329e587bcfcc18c16b16d253fed /arch/x86/cpu/tangier/Kconfig | |
| parent | b7026b0c98d2e9f6d190a80c500a0c21a0f3ddc8 (diff) | |
x86: Add Intel Tangier support
Add Intel Tangier SoC support.
Intel Tangier SoC is a core part of Intel Merrifield platform. For
example, Intel Edison board is based on such platform.
The patch is based on work done by the following people (in alphabetical
order):
Aiden Park <aiden.park@intel.com>
Dukjoon Jeon <dukjoon.jeon@intel.com>
eric.park <eric.park@intel.com>
Fabien Chereau <fabien.chereau@intel.com>
Scott D Phillips <scott.d.phillips@intel.com>
Sebastien Colleur <sebastienx.colleur@intel.com>
Steve Sakoman <steve.sakoman@intel.com>
Vincent Tinelli <vincent.tinelli@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'arch/x86/cpu/tangier/Kconfig')
| -rw-r--r-- | arch/x86/cpu/tangier/Kconfig | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/x86/cpu/tangier/Kconfig b/arch/x86/cpu/tangier/Kconfig new file mode 100644 index 0000000000..92d3352f3b --- /dev/null +++ b/arch/x86/cpu/tangier/Kconfig @@ -0,0 +1,20 @@ +# +# Copyright (c) 2017 Intel Corporation +# +# SPDX-License-Identifier: GPL-2.0+ +# + +config INTEL_TANGIER + bool + depends on INTEL_MID + +config SYS_CAR_ADDR + hex + default 0x19200000 + +config SYS_CAR_SIZE + hex + default 0x4000 + help + Space in bytes in eSRAM used as Cache-As-RAM (CAR). + Note this size must not exceed eSRAM's total size. |