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authorSimon Glass <sjg@chromium.org>2020-04-30 21:21:42 -0600
committerBin Meng <bmeng.cn@gmail.com>2020-05-04 15:28:28 +0800
commitfc486371c3696cf246163fc35e79c740a5d7d1b9 (patch)
tree38a5d9e860eaa3f275e5bb36c983582331307fbf /arch/x86/cpu/x86_64/cpu.c
parent37897c4073b408c6e0ea7faa4062b4e6876e9659 (diff)
x86: Update SPL for coreboot
At present SPL only works on bare-metal builds. With a few tweaks it can be used for coreboot also. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/x86_64/cpu.c')
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