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authorSimon Glass <sjg@chromium.org>2017-01-16 07:04:16 -0700
committerBin Meng <bmeng.cn@gmail.com>2017-02-07 13:07:23 +0800
commit1bff83637fdeda3b597ba5b4beb282445d5aeead (patch)
treed42dde6caeaaa6991886bd3089c0ad86040f5075 /arch/x86/cpu
parentfa5fcb3bc60c3c188b91f704b7d0d6b3810c9047 (diff)
x86: Move pirq_routing_table to global_data
To avoid using BSS in SPL before SDRAM is set up, move this field to global_data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/irq.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index e3e928bb79..442d373e09 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -17,8 +17,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct irq_routing_table *pirq_routing_table;
-
bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq)
{
struct irq_router *priv = dev_get_priv(dev);
@@ -219,7 +217,7 @@ static int create_pirq_routing_table(struct udevice *dev)
/* Fix up the table checksum */
rt->checksum = table_compute_checksum(rt, rt->size);
- pirq_routing_table = rt;
+ gd->arch.pirq_routing_table = rt;
return 0;
}
@@ -250,8 +248,8 @@ int irq_router_common_init(struct udevice *dev)
return ret;
}
/* Route PIRQ */
- pirq_route_irqs(dev, pirq_routing_table->slots,
- get_irq_slot_count(pirq_routing_table));
+ pirq_route_irqs(dev, gd->arch.pirq_routing_table->slots,
+ get_irq_slot_count(gd->arch.pirq_routing_table));
if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE))
irq_enable_sci(dev);
@@ -266,10 +264,10 @@ int irq_router_probe(struct udevice *dev)
ulong write_pirq_routing_table(ulong addr)
{
- if (!pirq_routing_table)
+ if (!gd->arch.pirq_routing_table)
return addr;
- return copy_pirq_routing_table(addr, pirq_routing_table);
+ return copy_pirq_routing_table(addr, gd->arch.pirq_routing_table);
}
static const struct udevice_id irq_router_ids[] = {