diff options
| author | Simon Glass <sjg@chromium.org> | 2019-09-25 08:00:11 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-10-08 13:50:08 +0800 |
| commit | 83311886151f80ef24d30f850baece07d08863cb (patch) | |
| tree | f13bd9053d87780e0c1624b978f9224602e951d9 /arch/x86/cpu | |
| parent | 61ba1244b548463dbfb3c5285b6b22e7c772c5bd (diff) | |
x86: Rename existing FSP code to fsp1
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
| -rw-r--r-- | arch/x86/cpu/baytrail/acpi.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/baytrail/fsp_configs.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/braswell/fsp_configs.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/fsp_configs.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/queensbay/fsp_configs.c | 2 | ||||
| -rw-r--r-- | arch/x86/cpu/queensbay/tnc.c | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 445e4ba2d7..1e3829a433 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -167,7 +167,7 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs) * and PMC_BASE_ADDRESS are accessed, so we need make sure the base addresses * of these two blocks are programmed by either U-Boot or FSP. * - * It has been verified that 1st phase API (see arch/x86/lib/fsp/fsp_car.S) + * It has been verified that 1st phase API (see arch/x86/lib/fsp1/fsp_car.S) * on Intel BayTrail SoC already initializes these two base addresses so * we are safe to access these registers here. */ diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index cefd26299a..5b5d66aa5e 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -7,7 +7,7 @@ #include <common.h> #include <fdtdec.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c index 7fe6fa7995..607e333f21 100644 --- a/arch/x86/cpu/braswell/fsp_configs.c +++ b/arch/x86/cpu/braswell/fsp_configs.c @@ -5,7 +5,7 @@ #include <common.h> #include <fdtdec.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c index 2fd06b3bed..773c2b2a0a 100644 --- a/arch/x86/cpu/ivybridge/fsp_configs.c +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -5,7 +5,7 @@ #include <common.h> #include <fdtdec.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index c4d117783c..0dd1901e07 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -5,7 +5,7 @@ */ #include <common.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> void update_fsp_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 76556fc7f7..66737e655b 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -12,7 +12,7 @@ #include <asm/post.h> #include <asm/arch/device.h> #include <asm/arch/tnc.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> #include <asm/processor.h> static int __maybe_unused disable_igd(void) |