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authorSimon Glass <sjg@chromium.org>2017-01-16 07:03:39 -0700
committerBin Meng <bmeng.cn@gmail.com>2017-02-06 11:38:46 +0800
commitc7ccb2c032a8a0c25ebd76e7c616952b0f52eb5d (patch)
treeb89fbd56f4a5f6c58f06dc178dd8b9daf208bbbf /arch/x86/cpu
parent8d8f3acda976f2f400df660b8da12b9b2c702986 (diff)
x86: ivybridge: Fix types for 64-bit compilation
Fix a few types that causes warnings on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/ivybridge/sata.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index 87ff872e20..c7ffbc11fd 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -53,7 +53,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
mode = fdt_getprop(blob, node, "intel,sata-mode", NULL);
if (!mode || !strcmp(mode, "ahci")) {
- u32 abar;
+ ulong abar;
debug("SATA: Controller in AHCI mode\n");
@@ -72,7 +72,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
/* Initialize AHCI memory-mapped space */
abar = dm_pci_read_bar32(dev, 5);
- debug("ABAR: %08X\n", abar);
+ debug("ABAR: %08lx\n", abar);
/* CAP (HBA Capabilities) : enable power management */
reg32 = readl(abar + 0x00);
reg32 |= 0x0c006000; /* set PSC+SSC+SALP+SSS */