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| author | Tom Rini <trini@konsulko.com> | 2016-06-12 09:55:16 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-06-12 09:55:16 -0400 |
| commit | b57129dbdade13ee152daf15a4221d8582f48387 (patch) | |
| tree | 6f3930a8a77cb163233e0cd6b1dcbe9784e776ec /arch/x86/dts/conga-qeval20-qa3-e3845.dts | |
| parent | a646f6698173ef4ff34c414f91541b4b8f014de1 (diff) | |
| parent | 9769e05bcf79939bad23a719982dd1f85a110f3c (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch/x86/dts/conga-qeval20-qa3-e3845.dts')
| -rw-r--r-- | arch/x86/dts/conga-qeval20-qa3-e3845.dts | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index 1a4ecaad0e..fba089d666 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -30,6 +30,22 @@ pch_pinctrl { compatible = "intel,x86-pinctrl"; + reg = <0 0>; + + /* + * As of today, the latest version FSP (gold4) for BayTrail + * misses the PAD configuration of the SD controller's Card + * Detect signal. The default PAD value for the CD pin sets + * the pin to work in GPIO mode, which causes card detect + * status cannot be reflected by the Present State register + * in the SD controller (bit 16 & bit 18 are always zero). + * + * Configure this pin to function 1 (SD controller). + */ + sdmmc3_cd@0 { + pad-offset = <0x3a0>; + mode-func = <1>; + }; }; chosen { @@ -217,7 +233,7 @@ fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; - fsp,emmc-boot-mode = <2>; + fsp,emmc-boot-mode = <1>; fsp,enable-sdio; fsp,enable-sdcard; fsp,enable-hsuart1; |