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author | Purna Chandra Mandal <purna.mandal@microchip.com> | 2016-06-02 14:26:08 +0530 |
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committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-06-10 12:31:12 +0200 |
commit | e19b9004575cacf1f64fff894621adafe0e7ea7f (patch) | |
tree | 2e282e236e11d6e43f4291b25dbe53d5ff89f982 /arch/x86/dts/conga-qeval20-qa3-e3845.dts | |
parent | 4b7b0a0f0635c1d1e4a0ae2ed172530b5f78e74b (diff) |
spi: pic32_spi: add SPI master driver for PIC32 SoC.
This driver implements SPI protocol in master mode to communicate
with the SPI device connected on SPI bus. It handles /CS explicitly
by controlling respective pin as gpio ('cs-gpios' property in dt node)
and uses PIO mode for SPI transaction. It is configurable based
on driver-model only.
Cc: Jagan Teki <jteki@openedev.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'arch/x86/dts/conga-qeval20-qa3-e3845.dts')
0 files changed, 0 insertions, 0 deletions