diff options
| author | Tom Rini <trini@konsulko.com> | 2016-01-14 21:51:32 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-01-14 21:51:32 -0500 |
| commit | 4edde96111aefac63d6aaca6ba87a90d149e973e (patch) | |
| tree | 83996996fc15554644c114e4f4d534d78cef15fd /arch/x86/dts | |
| parent | a737028e80603f49a4757adec10b5842d0689dbb (diff) | |
| parent | 5c2ed61ce235fd835a3f594bc983dfc20959568c (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch/x86/dts')
| -rw-r--r-- | arch/x86/dts/microcode/m12306a2_00000008.dtsi | 554 | ||||
| -rw-r--r-- | arch/x86/dts/microcode/m12306a4_00000007.dtsi | 618 | ||||
| -rw-r--r-- | arch/x86/dts/microcode/m12306a5_00000007.dtsi | 618 | ||||
| -rw-r--r-- | arch/x86/dts/microcode/m12306a8_00000010.dtsi | 682 | ||||
| -rw-r--r-- | arch/x86/dts/qemu-x86_i440fx.dts | 9 | ||||
| -rw-r--r-- | arch/x86/dts/qemu-x86_q35.dts | 9 |
6 files changed, 2474 insertions, 16 deletions
diff --git a/arch/x86/dts/microcode/m12306a2_00000008.dtsi b/arch/x86/dts/microcode/m12306a2_00000008.dtsi new file mode 100644 index 0000000000..6b35c39f8f --- /dev/null +++ b/arch/x86/dts/microcode/m12306a2_00000008.dtsi @@ -0,0 +1,554 @@ +/* + * Copyright (C) 2013, Intel Corporation + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * * Neither the name of Intel Corporation nor the names of its contributors may + * be used to endorse or promote products derived from this software without + * specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x8>; +intel,date-code = <0x5182011>; +intel,processor-signature = <0x306a2>; +intel,checksum = <0xa0e51feb>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x08000000 0x11201805 0xa2060300 + 0xeb1fe5a0 0x01000000 0x12000000 0xd01f0000 + 0x00200000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x08000000 + 0x00000000 0x00000000 0x17051120 0xd1070000 + 0x01000000 0xa2060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x5665ff94 0x179da7cf 0x1e819fb2 0xb0c24e8e + 0x5cb7beb5 0x43af9a6c 0xcb0b4ccc 0x195d8712 + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 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a/arch/x86/dts/microcode/m12306a4_00000007.dtsi b/arch/x86/dts/microcode/m12306a4_00000007.dtsi new file mode 100644 index 0000000000..c39fbd3cdf --- /dev/null +++ b/arch/x86/dts/microcode/m12306a4_00000007.dtsi @@ -0,0 +1,618 @@ +/* + * Copyright (C) 2013, Intel Corporation + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * * Neither the name of Intel Corporation nor the names of its contributors may + * be used to endorse or promote products derived from this software without + * specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x7>; +intel,date-code = <0x9082011>; +intel,processor-signature = <0x306a4>; +intel,checksum = <0x7e23e5af>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x07000000 0x11200809 0xa4060300 + 0xafe5237e 0x01000000 0x12000000 0xd0230000 + 0x00240000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x07000000 + 0x00000000 0x00000000 0x07091120 0xd1080000 + 0x01000000 0xa4060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x9539a0b3 0xc7bb991d 0x308f0f1a 0xb1ba077d + 0x8bd7260b 0xd710ad0c 0xf82ee64b 0xe6f11ce1 + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 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b/arch/x86/dts/microcode/m12306a5_00000007.dtsi new file mode 100644 index 0000000000..de5037252b --- /dev/null +++ b/arch/x86/dts/microcode/m12306a5_00000007.dtsi @@ -0,0 +1,618 @@ +/* + * Copyright (C) 2013, Intel Corporation + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * * Neither the name of Intel Corporation nor the names of its contributors may + * be used to endorse or promote products derived from this software without + * specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x7>; +intel,date-code = <0x9092011>; +intel,processor-signature = <0x306a5>; +intel,checksum = <0x8e38731>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x07000000 0x11200909 0xa5060300 + 0x3187e308 0x01000000 0x12000000 0xd0230000 + 0x00240000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x07000000 + 0x00000000 0x00000000 0x08091120 0x71080000 + 0x01000000 0xa5060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x27649db1 0x904b6445 0x6acff7e8 0xc4ac0631 + 0x6830ec45 0x3aece98d 0x97bf40c8 0x83b8fef0 + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 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b/arch/x86/dts/microcode/m12306a8_00000010.dtsi new file mode 100644 index 0000000000..0672ff1af0 --- /dev/null +++ b/arch/x86/dts/microcode/m12306a8_00000010.dtsi @@ -0,0 +1,682 @@ +/* + * Copyright (C) 2013, Intel Corporation + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * * Neither the name of Intel Corporation nor the names of its contributors may + * be used to endorse or promote products derived from this software without + * specific prior written permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + * --- + * This is a device tree fragment. Use #include to add these properties to a + * node. + * + * Date: + */ + +compatible = "intel,microcode"; +intel,header-version = <1>; +intel,update-revision = <0x10>; +intel,date-code = <0x2202012>; +intel,processor-signature = <0x306a8>; +intel,checksum = <0xe44a4ef2>; +intel,loader-revision = <1>; +intel,processor-flags = <0x12>; + +/* The first 48-bytes are the public header which repeats the above data */ +data = < + 0x01000000 0x10000000 0x12202002 0xa8060300 + 0xf24e4ae4 0x01000000 0x12000000 0xd0270000 + 0x00280000 0x00000000 0x00000000 0x00000000 + 0x00000000 0xa1000000 0x01000200 0x10000000 + 0x00000000 0x00000000 0x17021220 0xe1090000 + 0x01000000 0xa8060300 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 + 0x493d401b 0x64106cf1 0x0ffc7f0f 0x9b4b97f6 + 0xb8fab9c2 0x46353316 0x0247d91b 0x3c36c361 + 0xdb01345a 0xceecca42 0x5ee7d8b4 0x24afdbe6 + 0x5fb36178 0xbc17d76b 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a/arch/x86/dts/qemu-x86_i440fx.dts +++ b/arch/x86/dts/qemu-x86_i440fx.dts @@ -32,17 +32,10 @@ cpu@0 { device_type = "cpu"; - compatible = "cpu-x86"; + compatible = "cpu-qemu"; reg = <0>; intel,apic-id = <0>; }; - - cpu@1 { - device_type = "cpu"; - compatible = "cpu-x86"; - reg = <1>; - intel,apic-id = <1>; - }; }; tsc-timer { diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts index 0b685c8b79..145e8115ce 100644 --- a/arch/x86/dts/qemu-x86_q35.dts +++ b/arch/x86/dts/qemu-x86_q35.dts @@ -43,17 +43,10 @@ cpu@0 { device_type = "cpu"; - compatible = "cpu-x86"; + compatible = "cpu-qemu"; reg = <0>; intel,apic-id = <0>; }; - - cpu@1 { - device_type = "cpu"; - compatible = "cpu-x86"; - reg = <1>; - intel,apic-id = <1>; - }; }; tsc-timer { |