diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2018-06-03 19:04:16 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2018-06-13 09:50:57 +0800 |
| commit | 80abc8165e658f4538ef2ab00ceba118e097dbfd (patch) | |
| tree | 0b19ccd4a8e5bcb367ade740b13741bdbebaf9f6 /arch/x86/dts | |
| parent | b173b4ea3499739dec3d79489e689502b5d20300 (diff) | |
x86: cougarcanyon2: Update dts for SPI lock down
It turns out that like Braswell, Intel FSP for IvyBridge requires
SPI controller settings to be locked down, as the U-Boot ICH SPI
driver fails with the following message on Cougar Canyon 2 board:
"ICH SPI: Opcode 9f not found"
Update the SPI node property to indicate this fact.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/dts')
| -rw-r--r-- | arch/x86/dts/cougarcanyon2.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts index ea836eec95..8c71e98dfd 100644 --- a/arch/x86/dts/cougarcanyon2.dts +++ b/arch/x86/dts/cougarcanyon2.dts @@ -70,6 +70,8 @@ #address-cells = <1>; #size-cells = <0>; compatible = "intel,ich9-spi"; + intel,spi-lock-down; + spi-flash@0 { reg = <0>; compatible = "winbond,w25q64bv", "spi-flash"; |