diff options
| author | Simon Glass <sjg@chromium.org> | 2015-04-29 22:26:02 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-04-30 16:13:50 -0600 |
| commit | ede9709316f6c4d18d2a3e126879af2816c0b329 (patch) | |
| tree | b50ae3f944398dd07775c14afb135362d989cc15 /arch/x86/include/asm/arch-ivybridge/model_206ax.h | |
| parent | bcb0c61e1a7f2a418e986044a9ade06561f8f8a8 (diff) | |
x86: Add a CPU driver for baytrail
This driver supports multi-core init and sets up the CPU frequencies
correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/arch-ivybridge/model_206ax.h')
| -rw-r--r-- | arch/x86/include/asm/arch-ivybridge/model_206ax.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h b/arch/x86/include/asm/arch-ivybridge/model_206ax.h index 7b4f2e790b..d2f9006093 100644 --- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h +++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h @@ -37,7 +37,6 @@ #define MSR_MISC_PWR_MGMT 0x1aa #define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0) #define MSR_TURBO_RATIO_LIMIT 0x1ad -#define MSR_POWER_CTL 0x1fc #define MSR_PKGC3_IRTL 0x60a #define MSR_PKGC6_IRTL 0x60b @@ -63,7 +62,6 @@ #define MSR_PP1_CURRENT_CONFIG 0x602 #define PP1_CURRENT_LIMIT_SNB (35 << 3) /* 35 A */ #define PP1_CURRENT_LIMIT_IVB (50 << 3) /* 50 A */ -#define MSR_PKG_POWER_SKU_UNIT 0x606 #define MSR_PKG_POWER_SKU 0x614 #define IVB_CONFIG_TDP_MIN_CPUID 0x306a2 |