diff options
| author | Simon Glass <sjg@chromium.org> | 2019-09-25 08:56:40 -0600 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-10-08 13:57:47 +0800 |
| commit | a27520904f54643c9e55f5672f005a207c911f32 (patch) | |
| tree | 72b3ebee5003bf9b5aa7bd36cf82b7dc4d3abce0 /arch/x86/include/asm/cpu_common.h | |
| parent | f6d00da459694a42c1de1e42b159595e2f5ad56f (diff) | |
x86: Add new common CPU functions for turbo/burst mode
Add a few more CPU functions that are common on Intel CPUs. Also add
attribution for the code source.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add missing MSR_IA32_MISC_ENABLE write back in cpu_set_eist();
fix 2 typos in cpu_get_burst_mode_state() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/cpu_common.h')
| -rw-r--r-- | arch/x86/include/asm/cpu_common.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index c61d74e4a0..cdd99a90b7 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -79,4 +79,53 @@ void cpu_set_perf_control(uint clk_ratio); */ bool cpu_config_tdp_levels(void); +/** enum burst_mode_t - Burst-mode states */ +enum burst_mode_t { + BURST_MODE_UNKNOWN, + BURST_MODE_UNAVAILABLE, + BURST_MODE_DISABLED, + BURST_MODE_ENABLED +}; + +/* + * cpu_get_burst_mode_state() - Get the Burst/Turbo Mode State + * + * This reads MSR IA32_MISC_ENABLE 0x1A0 + * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED. + * Also checks cpuid 0x6 to see whether burst mode is supported. + * + * @return current burst mode status + */ +enum burst_mode_t cpu_get_burst_mode_state(void); + +/** + * cpu_set_burst_mode() - Set CPU burst mode + * + * @burst_mode: true to enable burst mode, false to disable + */ +void cpu_set_burst_mode(bool burst_mode); + +/** + * cpu_set_eist() - Enable Enhanced Intel Speed Step Technology + * + * @eist_status: true to enable EIST, false to disable + */ +void cpu_set_eist(bool eist_status); + +/** + * cpu_set_p_state_to_turbo_ratio() - Set turbo ratio + * + * TURBO_RATIO_LIMIT MSR (0x1AD) Bits 31:0 indicates the + * factory configured values for of 1-core, 2-core, 3-core + * and 4-core turbo ratio limits for all processors. + * + * 7:0 - MAX_TURBO_1_CORE + * 15:8 - MAX_TURBO_2_CORES + * 23:16 - MAX_TURBO_3_CORES + * 31:24 - MAX_TURBO_4_CORES + * + * Set PERF_CTL MSR (0x199) P_Req with that value. + */ +void cpu_set_p_state_to_turbo_ratio(void); + #endif |