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authorSimon Glass <sjg@chromium.org>2015-01-27 22:13:36 -0700
committerSimon Glass <sjg@chromium.org>2015-02-05 22:16:43 -0700
commit1021af4ded2d0961a4ba2ba89851719b098a98b6 (patch)
tree5e8228936b13970251110ac99a355d2ec0710e7f /arch/x86/include/asm/fsp/fsp_bootmode.h
parentef565a53ea96761ee8e705c0d56dbf160b672d51 (diff)
x86: Move common FSP code into a common location
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/fsp/fsp_bootmode.h')
-rw-r--r--arch/x86/include/asm/fsp/fsp_bootmode.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/x86/include/asm/fsp/fsp_bootmode.h b/arch/x86/include/asm/fsp/fsp_bootmode.h
new file mode 100644
index 0000000000..c3f8b49471
--- /dev/null
+++ b/arch/x86/include/asm/fsp/fsp_bootmode.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: Intel
+ */
+
+#ifndef __FSP_BOOT_MODE_H__
+#define __FSP_BOOT_MODE_H__
+
+/* 0x21 - 0xf..f are reserved */
+#define BOOT_FULL_CONFIG 0x00
+#define BOOT_MINIMAL_CONFIG 0x01
+#define BOOT_NO_CONFIG_CHANGES 0x02
+#define BOOT_FULL_CONFIG_PLUS_DIAG 0x03
+#define BOOT_DEFAULT_SETTINGS 0x04
+#define BOOT_ON_S4_RESUME 0x05
+#define BOOT_ON_S5_RESUME 0x06
+#define BOOT_ON_S2_RESUME 0x10
+#define BOOT_ON_S3_RESUME 0x11
+#define BOOT_ON_FLASH_UPDATE 0x12
+#define BOOT_IN_RECOVERY_MODE 0x20
+
+#endif