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authorSimon Glass <sjg@chromium.org>2019-10-02 08:26:41 +0800
committerBin Meng <bmeng.cn@gmail.com>2019-10-08 13:50:45 +0800
commit21a1133d823b3cadbbe9f18475948bfcd587be60 (patch)
tree2e816d01773e18013016149eea7b5f7c10630edd /arch/x86/include/asm/fsp
parente4499b52652cf2e13756d5b23b8d0118d5bf76d6 (diff)
x86: Move fsp_infoheader.h to the generic fsp directory
This header file is the same for FSP v1 and v2. Move it into the general fsp directory. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: move rename of fsp_infoheader.h from previous patch to this one] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/fsp')
-rw-r--r--arch/x86/include/asm/fsp/fsp_infoheader.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/x86/include/asm/fsp/fsp_infoheader.h b/arch/x86/include/asm/fsp/fsp_infoheader.h
new file mode 100644
index 0000000000..86f78014b7
--- /dev/null
+++ b/arch/x86/include/asm/fsp/fsp_infoheader.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: Intel */
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#ifndef _FSP_HEADER_H_
+#define _FSP_HEADER_H_
+
+#define FSP_HEADER_OFF 0x94 /* Fixed FSP header offset in the FSP image */
+
+struct __packed fsp_header {
+ u32 sign; /* 'FSPH' */
+ u32 hdr_len; /* header length */
+ u8 reserved1[3];
+ u8 hdr_rev; /* header rev */
+ u32 img_rev; /* image rev */
+ char img_id[8]; /* signature string */
+ u32 img_size; /* image size */
+ u32 img_base; /* image base */
+ u32 img_attr; /* image attribute */
+ u32 cfg_region_off; /* configuration region offset */
+ u32 cfg_region_size; /* configuration region size */
+ u32 api_num; /* number of API entries */
+ u32 fsp_tempram_init; /* tempram_init offset */
+ u32 fsp_init; /* fsp_init offset */
+ u32 fsp_notify; /* fsp_notify offset */
+ u32 fsp_mem_init; /* fsp_mem_init offset */
+ u32 fsp_tempram_exit; /* fsp_tempram_exit offset */
+ u32 fsp_silicon_init; /* fsp_silicon_init offset */
+};
+
+#define FSP_HEADER_REVISION_1 1
+#define FSP_HEADER_REVISION_2 2
+
+#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0)
+
+#endif