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authorBin Meng <bmeng.cn@gmail.com>2017-04-21 07:24:30 -0700
committerBin Meng <bmeng.cn@gmail.com>2017-05-17 17:11:46 +0800
commitb7ef3bffffe05002e88419d4a3bfe8a56f937e70 (patch)
treee380747f708a675e50bfb006c72bd368f98bc1aa /arch/x86/include/asm/post.h
parentfcf2fba472ede05df2e7ed5fb141b8caf4f09681 (diff)
x86: Add post codes for OS resume
This adds OS_RESUME (0x40) and RESUME_FAILURE (0xed) post codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/x86/include/asm/post.h')
-rw-r--r--arch/x86/include/asm/post.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/post.h b/arch/x86/include/asm/post.h
index 6b774bdbe8..f627663f31 100644
--- a/arch/x86/include/asm/post.h
+++ b/arch/x86/include/asm/post.h
@@ -31,10 +31,12 @@
#define POST_MRC 0x2f
#define POST_DRAM 0x30
#define POST_LAPIC 0x31
+#define POST_OS_RESUME 0x40
#define POST_RAM_FAILURE 0xea
#define POST_BIST_FAILURE 0xeb
#define POST_CAR_FAILURE 0xec
+#define POST_RESUME_FAILURE 0xed
/* Output a post code using al - value must be 0 to 0xff */
#ifdef __ASSEMBLY__