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authorSimon Glass <sjg@chromium.org>2015-04-28 20:11:29 -0600
committerSimon Glass <sjg@chromium.org>2015-04-29 21:02:31 -0600
commitff6a8f3c06eab0f0afb65d5e5925eee9860f0add (patch)
tree365c5606944eb9a1c9ae4bfd8e1f79e138257241 /arch/x86/include/asm/processor.h
parent87f4cd3a308b0bcffd8f9b5e7121fdb086c080f5 (diff)
x86: Implement reset_cpu() correctly for modern CPUs
The existing code is pretty ancient and is unreliable on modern hardware. Generally it will hang. We can use port 0xcf9 to initiate reset on more modern hardware (say in the last 10 years). Update the reset_cpu() function to do this, and add a new 'full reset' function to perform a full power cycle. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include/asm/processor.h')
-rw-r--r--arch/x86/include/asm/processor.h19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 3e26202aa5..3575d34a53 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -25,8 +25,27 @@
#ifndef __ASSEMBLY__
+/*
+ * This register is documented in (for example) the Intel Atom Processor E3800
+ * Product Family Datasheet in "PCU - Power Management Controller (PMC)".
+ *
+ * RST_CNT: Reset Control Register (RST_CNT) Offset cf9.
+ *
+ * The naming follows Intel's naming.
+ */
#define PORT_RESET 0xcf9
+enum {
+ SYS_RST = 1 << 1, /* 0 for soft reset, 1 for hard reset */
+ RST_CPU = 1 << 2, /* initiate reset */
+ FULL_RST = 1 << 3, /* full power cycle */
+};
+
+/**
+ * x86_full_reset() - reset everything: perform a full power cycle
+ */
+void x86_full_reset(void);
+
static inline __attribute__((always_inline)) void cpu_hlt(void)
{
asm("hlt");