diff options
| author | Simon Glass <sjg@chromium.org> | 2015-01-27 22:13:33 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-02-05 22:16:43 -0700 |
| commit | 2d934e5703b712686c3ec67f6d5eeb137c68805d (patch) | |
| tree | 31052345a6556760420f3c5435eae749d359e255 /arch/x86/include | |
| parent | eea0f11278d9104960dfb1fbfcddfb796a3e0bb5 (diff) | |
x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/arch-ivybridge/sandybridge.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/arch-ivybridge/sandybridge.h b/arch/x86/include/asm/arch-ivybridge/sandybridge.h index cf7457f42d..c9605258b5 100644 --- a/arch/x86/include/asm/arch-ivybridge/sandybridge.h +++ b/arch/x86/include/asm/arch-ivybridge/sandybridge.h @@ -43,7 +43,7 @@ #define DEFAULT_EPBAR 0xfed19000 /* 4 KB */ #define DEFAULT_RCBABASE 0xfed1c000 /* 4 KB per PCIe device */ -#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS +#define DEFAULT_PCIEXBAR CONFIG_PCIE_ECAM_BASE /* Device 0:0.0 PCI configuration space (Host Bridge) */ #define EPBAR 0x40 |