diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-07-28 20:02:15 +0300 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2017-08-01 20:17:02 +0800 |
| commit | c3df28f6e2fc7299883f3340475c532f18754585 (patch) | |
| tree | fb8bbe43822bd58364739786ee39ceeb3a49fc05 /arch/x86/include | |
| parent | 167a40166bb116a19d23c946b6394636da34f3cf (diff) | |
x86: Make table address selectable
Some firmwares might have another window for generated tables.
So, introduce two configuration options to select start address and
maximum length for the generated tables.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include')
| -rw-r--r-- | arch/x86/include/asm/tables.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h index 9e8208ba2b..c784a2aeec 100644 --- a/arch/x86/include/asm/tables.h +++ b/arch/x86/include/asm/tables.h @@ -9,13 +9,8 @@ #include <tables_csum.h> -/* - * All x86 tables happen to like the address range from 0xf0000 to 0x100000. - * We use 0xf0000 as the starting address to store those tables, including - * PIRQ routing table, Multi-Processor table and ACPI table. - */ -#define ROM_TABLE_ADDR 0xf0000 -#define ROM_TABLE_END 0xfffff +#define ROM_TABLE_ADDR CONFIG_ROM_TABLE_ADDR +#define ROM_TABLE_END (CONFIG_ROM_TABLE_ADDR + CONFIG_ROM_TABLE_SIZE - 1) #define ROM_TABLE_ALIGN 1024 |