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authorCalvin Johnson <calvin.johnson@nxp.com>2018-03-08 15:30:33 +0530
committerJoe Hershberger <joe.hershberger@ni.com>2018-03-22 15:05:30 -0500
commitc4dc68b02ff9f6c1ccb088a06cf0445e4031f093 (patch)
tree8563a0797b103a7edd5007186bc7bb9cb6e46116 /arch/x86/lib/northbridge-uclass.c
parentc44f8125bc255f3c473d721441f1781a0d0bb1bc (diff)
armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces to bufferable. 2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces. 3. Disable ECC detection for PFE. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'arch/x86/lib/northbridge-uclass.c')
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