diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2015-10-22 19:13:28 -0700 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2015-11-13 06:46:17 -0800 |
commit | 0a2ea0206815bab1db1285108d013c7627b68bd9 (patch) | |
tree | 49871bce8fcc6f6060b5471c94b3eb3aadff927b /arch/x86/lib | |
parent | 360c3013c85024c171692b29fc5900aa8e1f5e47 (diff) |
x86: Fix cosmetic issues in the i8254 and i8259 codes
This cleans up i8254 and i8259 codes to fix several cosmetic
issues, like coding convention and some comments improvement.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/lib')
-rw-r--r-- | arch/x86/lib/pcat_interrupts.c | 21 | ||||
-rw-r--r-- | arch/x86/lib/pcat_timer.c | 10 |
2 files changed, 15 insertions, 16 deletions
diff --git a/arch/x86/lib/pcat_interrupts.c b/arch/x86/lib/pcat_interrupts.c index 9780f46270..b9d06140d4 100644 --- a/arch/x86/lib/pcat_interrupts.c +++ b/arch/x86/lib/pcat_interrupts.c @@ -28,10 +28,11 @@ int i8259_init(void) outb(0xff, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); - /* Master PIC */ - /* Place master PIC interrupts at INT20 */ - /* ICW3, One slave PIC is present */ - outb(ICW1_SEL|ICW1_EICW4, MASTER_PIC + ICW1); + /* + * Master PIC + * Place master PIC interrupts at INT20 + */ + outb(ICW1_SEL | ICW1_EICW4, MASTER_PIC + ICW1); outb(0x20, MASTER_PIC + ICW2); outb(IR2, MASTER_PIC + ICW3); outb(ICW4_PM, MASTER_PIC + ICW4); @@ -39,10 +40,11 @@ int i8259_init(void) for (i = 0; i < 8; i++) outb(OCW2_SEOI | i, MASTER_PIC + OCW2); - /* Slave PIC */ - /* Place slave PIC interrupts at INT28 */ - /* Slave ID */ - outb(ICW1_SEL|ICW1_EICW4, SLAVE_PIC + ICW1); + /* + * Slave PIC + * Place slave PIC interrupts at INT28 + */ + outb(ICW1_SEL | ICW1_EICW4, SLAVE_PIC + ICW1); outb(0x28, SLAVE_PIC + ICW2); outb(0x02, SLAVE_PIC + ICW3); outb(ICW4_PM, SLAVE_PIC + ICW4); @@ -110,9 +112,6 @@ void specific_eoi(int irq) outb(OCW2_SEOI | irq, MASTER_PIC + OCW2); } -#define ELCR1 0x4d0 -#define ELCR2 0x4d1 - void configure_irq_trigger(int int_num, bool is_level_triggered) { u16 int_bits = inb(ELCR1) | (((u16)inb(ELCR2)) << 8); diff --git a/arch/x86/lib/pcat_timer.c b/arch/x86/lib/pcat_timer.c index 3545a5048e..ce15818ec2 100644 --- a/arch/x86/lib/pcat_timer.c +++ b/arch/x86/lib/pcat_timer.c @@ -9,17 +9,17 @@ #include <asm/io.h> #include <asm/i8254.h> -#define TIMER2_VALUE 0x0a8e /* 440Hz */ +#define TIMER2_VALUE 0x0a8e /* 440Hz */ int pcat_timer_init(void) { /* - * initialize 2, used to drive the speaker - * (to start a beep: write 3 to port 0x61, - * to stop it again: write 0) + * Initialize counter 2, used to drive the speaker. + * To start a beep, set both bit0 and bit1 of port 0x61. + * To stop it, clear both bit0 and bit1 of port 0x61. */ outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3, - PIT_BASE + PIT_COMMAND); + PIT_BASE + PIT_COMMAND); outb(TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2); outb(TIMER2_VALUE >> 8, PIT_BASE + PIT_T2); |