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authorBin Meng <bmeng.cn@gmail.com>2017-01-18 03:32:57 -0800
committerBin Meng <bmeng.cn@gmail.com>2017-02-07 13:27:11 +0800
commit2cffd90f14de4fafe953145f3a72fd0fdbf631b2 (patch)
tree9a26b3313aa653219a829fcb5dfa72d92c4283ed /arch/x86
parent63767071d977d428264769fe7923da6a59cb166b (diff)
x86: qemu: Set up device tree for SPL
Add the correct pre-relocation tag so that the required device tree nodes are present in the SPL device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/dts/qemu-x86_i440fx.dts4
-rw-r--r--arch/x86/dts/qemu-x86_q35.dts4
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/dts/qemu-x86_i440fx.dts b/arch/x86/dts/qemu-x86_i440fx.dts
index 9c3f2a08e6..afea14ed32 100644
--- a/arch/x86/dts/qemu-x86_i440fx.dts
+++ b/arch/x86/dts/qemu-x86_i440fx.dts
@@ -29,10 +29,12 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ u-boot,dm-pre-reloc;
cpu@0 {
device_type = "cpu";
compatible = "cpu-qemu";
+ u-boot,dm-pre-reloc;
reg = <0>;
intel,apic-id = <0>;
};
@@ -54,9 +56,11 @@
pch@1,0 {
reg = <0x00000800 0 0 0 0>;
compatible = "intel,pch7";
+ u-boot,dm-pre-reloc;
irq-router {
compatible = "intel,irq-router";
+ u-boot,dm-pre-reloc;
intel,pirq-config = "pci";
intel,pirq-link = <0x60 4>;
intel,pirq-mask = <0x0e40>;
diff --git a/arch/x86/dts/qemu-x86_q35.dts b/arch/x86/dts/qemu-x86_q35.dts
index 0d462a9c78..bc398dd72c 100644
--- a/arch/x86/dts/qemu-x86_q35.dts
+++ b/arch/x86/dts/qemu-x86_q35.dts
@@ -40,10 +40,12 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ u-boot,dm-pre-reloc;
cpu@0 {
device_type = "cpu";
compatible = "cpu-qemu";
+ u-boot,dm-pre-reloc;
reg = <0>;
intel,apic-id = <0>;
};
@@ -65,9 +67,11 @@
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
+ u-boot,dm-pre-reloc;
irq-router {
compatible = "intel,irq-router";
+ u-boot,dm-pre-reloc;
intel,pirq-config = "pci";
intel,actl-8bit;
intel,actl-addr = <0x44>;