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authorSimon Glass <sjg@chromium.org>2019-12-29 21:19:13 -0700
committerSimon Glass <sjg@chromium.org>2020-01-07 16:02:38 -0700
commit3d9acea3d9ae45037ff2fd1e4c2f877f0466ce6a (patch)
tree8abecc2f1eecb4f243d98f9455ddfdb643659528 /arch/x86
parent1058eec0f4a34a28095276729d390885d468a44f (diff)
x86: apl: Avoid accessing the PCI bus before it is probed
The PCI bus is not actually probed by the time the ofdata_to_platdata() method is called since that happens in the uclass's post_probe() method. Update the PMC and P2SB drivers to access the bus in its probe() method. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/apollolake/p2sb.c20
-rw-r--r--arch/x86/cpu/apollolake/pmc.c20
2 files changed, 29 insertions, 11 deletions
diff --git a/arch/x86/cpu/apollolake/p2sb.c b/arch/x86/cpu/apollolake/p2sb.c
index eb27861b7a..b72f50a627 100644
--- a/arch/x86/cpu/apollolake/p2sb.c
+++ b/arch/x86/cpu/apollolake/p2sb.c
@@ -106,11 +106,6 @@ int apl_p2sb_ofdata_to_platdata(struct udevice *dev)
if (plat->bdf < 0)
return log_msg_ret("Cannot get p2sb PCI address",
plat->bdf);
- } else {
- plat->mmio_base = dev_read_addr_pci(dev);
- /* Don't set BDF since it should not be used */
- if (!plat->mmio_base || plat->mmio_base == FDT_ADDR_T_NONE)
- return -EINVAL;
}
#else
plat->mmio_base = plat->dtplat.early_regs[0];
@@ -124,10 +119,19 @@ int apl_p2sb_ofdata_to_platdata(struct udevice *dev)
static int apl_p2sb_probe(struct udevice *dev)
{
- if (spl_phase() == PHASE_TPL)
+ if (spl_phase() == PHASE_TPL) {
return apl_p2sb_early_init(dev);
- else if (spl_phase() == PHASE_SPL)
- return apl_p2sb_spl_init(dev);
+ } else {
+ struct p2sb_platdata *plat = dev_get_platdata(dev);
+
+ plat->mmio_base = dev_read_addr_pci(dev);
+ /* Don't set BDF since it should not be used */
+ if (!plat->mmio_base || plat->mmio_base == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ if (spl_phase() == PHASE_SPL)
+ return apl_p2sb_spl_init(dev);
+ }
return 0;
}
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index 683c6082f2..aec0c8394c 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -119,8 +119,16 @@ int apl_pmc_ofdata_to_uc_platdata(struct udevice *dev)
ret = dev_read_u32_array(dev, "early-regs", base, ARRAY_SIZE(base));
if (ret)
return log_msg_ret("Missing/short early-regs", ret);
- upriv->pmc_bar0 = (void *)base[0];
- upriv->pmc_bar2 = (void *)base[2];
+ if (spl_phase() == PHASE_TPL) {
+ upriv->pmc_bar0 = (void *)base[0];
+ upriv->pmc_bar2 = (void *)base[2];
+
+ /* Since PCI is not enabled, we must get the BDF manually */
+ plat->bdf = pci_get_devfn(dev);
+ if (plat->bdf < 0)
+ return log_msg_ret("Cannot get PMC PCI address",
+ plat->bdf);
+ }
upriv->acpi_base = base[4];
/* Since PCI is not enabled, we must get the BDF manually */
@@ -187,8 +195,14 @@ static int enable_pmcbar(struct udevice *dev)
static int apl_pmc_probe(struct udevice *dev)
{
- if (spl_phase() == PHASE_TPL)
+ if (spl_phase() == PHASE_TPL) {
return enable_pmcbar(dev);
+ } else {
+ struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev);
+
+ upriv->pmc_bar0 = (void *)dm_pci_read_bar32(dev, 0);
+ upriv->pmc_bar2 = (void *)dm_pci_read_bar32(dev, 2);
+ }
return 0;
}