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authorSimon Glass <sjg@chromium.org>2019-04-25 21:59:02 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-05-08 13:02:15 +0800
commit9ffe7cd5c421e21317d56c80c1390aba636b3ffb (patch)
treeacf7106838f8d08002940c533c863c8f568b0502 /arch/x86
parentb69b603bcdeb05f846f76da81e4a681aff6a1001 (diff)
x86: ivybridge: Implement PCH_REQ_PMBASE_INFO
Implement this ioctl() to support power off. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/cpu/ivybridge/bd82x6x.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index ed9bce6416..1cb6cecda9 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -229,6 +229,21 @@ static int bd82x6x_ioctl(struct udevice *dev, enum pch_req_t req, void *data,
return -ENOENT;
return val & RCBA_AUDIO_CONFIG_MASK;
+ case PCH_REQ_PMBASE_INFO: {
+ struct pch_pmbase_info *pm = data;
+ int ret;
+
+ /* Find the base address of the powermanagement registers */
+ ret = dm_pci_read_config16(dev, 0x40, &pm->base);
+ if (ret)
+ return ret;
+ pm->base &= 0xfffe;
+ pm->gpio0_en_ofs = GPE0_EN;
+ pm->pm1_sts_ofs = PM1_STS;
+ pm->pm1_cnt_ofs = PM1_CNT;
+
+ return 0;
+ }
default:
return -ENOSYS;
}