diff options
| author | Tom Rini <trini@ti.com> | 2012-07-30 11:49:47 -0700 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:13 +0200 |
| commit | a74f0c7cb505d3e2184bfd2ab42c3a6e45a1d54a (patch) | |
| tree | 23885e01becaecb7258d20cb9077c4831877539f /arch/x86 | |
| parent | 82afcc9efd4a734f550381fab311644de2c4c524 (diff) | |
am33xx: Correct and clean up ddr_regs struct
The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported). Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, remove. Next, setting of the
'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the
ddr_data entries, so program it there. Finally, comment on how we are
configuring the DATA1 registers that correspond to the DATA0 (dt0)
registers defined in the struct.
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/x86')
0 files changed, 0 insertions, 0 deletions