xtensa: add support for the xtensa processor architecture [2/2]

The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.

This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>

1 files changed, 14 insertions, 0 deletions

diff --git a/arch/xtensa/include/asm/relocate.h b/arch/xtensa/include/asm/relocate.h
new file mode 100644
index 0000000000..9c4ce23988
--- /dev/null
+++ b/arch/xtensa/include/asm/relocate.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright (C) 2016 Cadence Design Systems Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_XTENSA_RELOCATE_H
+#define _ASM_XTENSA_RELOCATE_H
+
+#include <common.h>
+
+int clear_bss(void);
+
+#endif	/* _ASM_XTENSA_RELOCATE_H */