diff options
| author | Chris Zankel <chris@zankel.net> | 2016-08-10 18:36:44 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-08-15 18:46:38 -0400 |
| commit | c978b52410016b0ab5a213f235596340af8d45f7 (patch) | |
| tree | b01e9a8ea9a92fe962a545974339677b87dcc1ba /arch/xtensa/lib/Makefile | |
| parent | de5e5cea022ab44006ff1edf45a39f0943fb9dff (diff) | |
xtensa: add support for the xtensa processor architecture [2/2]
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/xtensa/lib/Makefile')
| -rw-r--r-- | arch/xtensa/lib/Makefile | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/xtensa/lib/Makefile b/arch/xtensa/lib/Makefile new file mode 100644 index 0000000000..7c7d8d59bc --- /dev/null +++ b/arch/xtensa/lib/Makefile @@ -0,0 +1,10 @@ +# +# (C) Copyright 2007 - 2013 Tensilica Inc. +# (C) Copyright 2014 - 2016 Cadence Design Systems Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_CMD_BOOTM) += bootm.o + +obj-y += cache.o misc.o relocate.o time.o |