diff options
author | Simon Glass <sjg@chromium.org> | 2016-03-11 22:07:16 -0700 |
---|---|---|
committer | Bin Meng <bmeng.cn@gmail.com> | 2016-03-17 10:27:25 +0800 |
commit | 0adf8d3548c3fe6f577bb0f2a7acd855dced8a83 (patch) | |
tree | cfa84d30a80b842aa55ae0839be3bc5bcfcab30a /arch | |
parent | 779653b0cbe3f634632bc4ecae1ce5df84638326 (diff) |
x86: Add support for running Intel reference code
Intel has invented yet another binary blob which firmware is required to
run. This is run after SDRAM is ready. It is linked to load at a particular
address, typically 0, but is a relocatable ELF so can be moved if required.
Add support for this in the build system. The file should be placed in the
board directory, and called refcode.elf.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/Kconfig | 11 | ||||
-rw-r--r-- | arch/x86/include/asm/cpu.h | 12 |
2 files changed, 23 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 64c824f717..1a9fa40081 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -327,6 +327,17 @@ config DCACHE_RAM_MRC_VAR_SIZE memory reference code and must be set correctly or the board will not boot. +config HAVE_REFCODE + bool "Add a Reference Code binary" + help + Select this option to add a Reference Code binary to the resulting + U-Boot image. This is an Intel binary blob that handles system + initialisation, in this case the PCH and System Agent. + + Note: Without this binary (on platforms that need it such as + broadwell) U-Boot will be missing some critical setup steps. + Various peripherals may fail to work. + config SMP bool "Enable Symmetric Multiprocessing" default n diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 85386da47a..789275792f 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -275,4 +275,16 @@ u32 cpu_get_family_model(void); */ u32 cpu_get_stepping(void); +/** + * cpu_run_reference_code() - Run the platform reference code + * + * Some platforms require a binary blob to be executed once SDRAM is + * available. This is used to set up various platform features, such as the + * platform controller hub (PCH). This function should be implemented by the + * CPU-specific code. + * + * @return 0 on success, -ve on failure + */ +int cpu_run_reference_code(void); + #endif |