diff options
| author | Philippe CORNU <philippe.cornu@st.com> | 2018-03-02 15:59:26 +0100 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2018-03-19 10:58:16 +0100 |
| commit | 0e75aa4d1d4bee53ccb171c6ee1060ac3dc3c0b0 (patch) | |
| tree | b094be326c1896a237a89f920a982c6ee04cf6e1 /arch | |
| parent | e6194ce6124aab625a984fd8d1599c2862dcf532 (diff) | |
arm: dts: stm32: add ltdc for STM32F746
Add display controller node in device-tree.
Signed-off-by: yannick fertre <yannick.fertre@st.com>
[agust: rebased on master]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/stm32f746.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 8c6fa133e0..8581df9a27 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -330,6 +330,15 @@ interrupts = <50>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>; }; + + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; + u-boot,dm-pre-reloc; + status = "disabled"; + }; }; }; |