diff options
author | Kever Yang <kever.yang@rock-chips.com> | 2019-07-09 21:58:44 +0800 |
---|---|---|
committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-20 23:59:44 +0800 |
commit | 25c61730994918471cd16c741c488c8e64bcb715 (patch) | |
tree | 2d48384f803fc8f58247630ede0d12d1073aabd6 /arch | |
parent | ccab9e7ee3c4447c4bf5f4456f56a6b46f475ad4 (diff) |
rockchip: rk3288: move configure_l2ctlr back to rk3288
The configure_l2ctlr() is used only by rk3288, do not need to
locate in sys_proto.h
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/sys_proto.h | 22 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/rk3288/rk3288.c | 22 |
2 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h index 928e4f258b..905c774c15 100644 --- a/arch/arm/include/asm/arch-rockchip/sys_proto.h +++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h @@ -6,28 +6,6 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H -#ifdef CONFIG_ROCKCHIP_RK3288 -#include <asm/armv7.h> - -static void configure_l2ctlr(void) -{ - uint32_t l2ctlr; - - l2ctlr = read_l2ctlr(); - l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */ - - /* - * Data RAM write latency: 2 cycles - * Data RAM read latency: 2 cycles - * Data RAM setup latency: 1 cycle - * Tag RAM write latency: 1 cycle - * Tag RAM read latency: 1 cycle - * Tag RAM setup latency: 1 cycle - */ - l2ctlr |= (1 << 3 | 1 << 0); - write_l2ctlr(l2ctlr); -} -#endif /* CONFIG_ROCKCHIP_RK3288 */ /* provided to defeat compiler optimisation in board_init_f() */ void gru_dummy_function(int i); diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 5300650e19..7552472fbc 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -2,12 +2,34 @@ /* * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include <asm/armv7.h> #include <asm/io.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3288.h> #define GRF_BASE 0xff770000 +#ifdef CONFIG_SPL_BUILD +static void configure_l2ctlr(void) +{ + u32 l2ctlr; + + l2ctlr = read_l2ctlr(); + l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */ + + /* + * Data RAM write latency: 2 cycles + * Data RAM read latency: 2 cycles + * Data RAM setup latency: 1 cycle + * Tag RAM write latency: 1 cycle + * Tag RAM read latency: 1 cycle + * Tag RAM setup latency: 1 cycle + */ + l2ctlr |= (1 << 3 | 1 << 0); + write_l2ctlr(l2ctlr); +} +#endif + int arch_cpu_init(void) { #ifdef CONFIG_SPL_BUILD |