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authorMarek Vasut <marex@denx.de>2018-08-18 16:00:31 +0200
committerMarek Vasut <marex@denx.de>2018-08-24 12:05:20 +0200
commit331c37221057e6a1291b6e14d9f033a7a90051f1 (patch)
tree8c3e682027c195195aa513165d1bef60ed5a1e2a /arch
parentcca9af63a32220e0a270ac62fa9c46a0ed4ca0ce (diff)
ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework and the DW APB timer driver. This allows the A10 to extract timer information, like timer rate, from clock framework and thus DT instead of having it hardcoded in U-Boot configuration files. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-socfpga/Makefile1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 654999cdf6..e66720447f 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -26,7 +26,6 @@ obj-y += clock_manager_arria10.o
obj-y += misc_arria10.o
obj-y += pinmux_arria10.o
obj-y += reset_manager_arria10.o
-obj-y += timer.o
endif
ifdef CONFIG_TARGET_SOCFPGA_STRATIX10