diff options
author | Jason Jin <Jason.jin@freescale.com> | 2011-08-19 10:02:32 +0800 |
---|---|---|
committer | jason <jason@jason-ThinkPad-T61.(none)> | 2011-09-04 22:46:55 +0800 |
commit | 444ddfc751038625035b0d7dddef88c1b313422b (patch) | |
tree | 1ebf75a88f87353f4e66904bc8de862f488f1130 /arch | |
parent | 6c0bf27d74510d1d7fac9208e766eae8efac2592 (diff) |
ColdFire:Update the timer_init since it was unified.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/m68k/cpu/mcf547x_8x/slicetimer.c | 3 | ||||
-rw-r--r-- | arch/m68k/lib/board.c | 2 | ||||
-rw-r--r-- | arch/m68k/lib/time.c | 6 |
3 files changed, 7 insertions, 4 deletions
diff --git a/arch/m68k/cpu/mcf547x_8x/slicetimer.c b/arch/m68k/cpu/mcf547x_8x/slicetimer.c index 467a807802..ee2e35bd51 100644 --- a/arch/m68k/cpu/mcf547x_8x/slicetimer.c +++ b/arch/m68k/cpu/mcf547x_8x/slicetimer.c @@ -72,7 +72,7 @@ void dtimer_interrupt(void *not_used) } } -void timer_init(void) +int timer_init(void) { volatile slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE); @@ -93,6 +93,7 @@ void timer_init(void) /* set a period of 1us, set timer mode to restart and enable timer and interrupt */ timerp->cr = SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN; + return 0; } ulong get_timer(ulong base) diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 945ab66d92..1df50f1fe5 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -78,8 +78,6 @@ static char *failed = "*** failed ***\n"; extern ulong __init_end; extern ulong __bss_end__; -extern void timer_init(void); - #if defined(CONFIG_WATCHDOG) # define INIT_FUNC_WATCHDOG_INIT watchdog_init, # define WATCHDOG_DISABLE watchdog_disable diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index a316cdfd4e..a0e2441719 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -91,7 +91,7 @@ void dtimer_interrupt(void *not_used) } } -void timer_init(void) +int timer_init(void) { volatile dtmr_t *timerp = (dtmr_t *) (CONFIG_SYS_TMR_BASE); @@ -114,6 +114,8 @@ void timer_init(void) /* set a period of 1us, set timer mode to restart and enable timer and interrupt */ timerp->tmr = CONFIG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN; + + return 0; } ulong get_timer(ulong base) @@ -162,6 +164,8 @@ void timer_init(void) timerp->pcsr = PIT_PCSR_OVW; timerp->pmr = lastinc = 0; timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN; + + return 0; } ulong get_timer(ulong base) |