diff options
| author | Tony Wu <tung7970@gmail.com> | 2015-05-30 15:02:39 +0800 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2015-07-02 11:29:33 +0200 |
| commit | 49bbdae318e31758cab7ed15aa29abd8ad18de13 (patch) | |
| tree | 1f79386e9d956cd4f17b4760128b97af997df58e /arch | |
| parent | 891b487098ee2169a16b1bbb354aaef28aa90630 (diff) | |
MIPS: fix missing semicolon in cacheops.h
Fix missing semicolon in cacheops.h introduced in commit
2b8bcc5a2 (MIPS: avoid .set ISA for cache operations)
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/include/asm/cacheops.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h index 75ec380980..af2adc701e 100644 --- a/arch/mips/include/asm/cacheops.h +++ b/arch/mips/include/asm/cacheops.h @@ -18,7 +18,7 @@ static inline void mips_cache(int op, const volatile void *addr) #ifdef __GCC_HAVE_BUILTIN_MIPS_CACHE __builtin_mips_cache(op, addr); #else - __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr)) + __asm__ __volatile__("cache %0, %1" : : "i"(op), "R"(addr)); #endif } |