board_f: Drop board_type parameter from initdram()

It looks like only cm5200 and tqm8xx use this feature, so we don't really
need it in generic code. Drop it and have the users access gd->board_type
directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

9 files changed, 12 insertions, 12 deletions

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index cebbb0fec5..d260e5d62f 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -874,7 +874,7 @@ void update_early_mmu_table(void)
 
 __weak int dram_init(void)
 {
-	gd->ram_size = initdram(0);
+	gd->ram_size = initdram();
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 	/* This will break-before-make MMU for DDR */
 	update_early_mmu_table();
diff --git a/arch/mips/mach-ath79/dram.c b/arch/mips/mach-ath79/dram.c
index c29e98c2f4..5ef43a059d 100644
--- a/arch/mips/mach-ath79/dram.c
+++ b/arch/mips/mach-ath79/dram.c
@@ -9,7 +9,7 @@
 #include <asm/addrspace.h>
 #include <mach/ddr.h>
 
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	ddr_tap_tuning();
 	return get_ram_size((void *)KSEG1, SZ_256M);
diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index ac33391921..f15b58d849 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -110,7 +110,7 @@ static void ddr2_pmd_ungate(void)
 }
 
 /* initialize the DDR2 Controller and DDR2 PHY */
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	ddr2_pmd_ungate();
 	ddr2_phy_init();
diff --git a/arch/powerpc/cpu/mpc5xxx/spl_boot.c b/arch/powerpc/cpu/mpc5xxx/spl_boot.c
index e182dfbd45..23d2010343 100644
--- a/arch/powerpc/cpu/mpc5xxx/spl_boot.c
+++ b/arch/powerpc/cpu/mpc5xxx/spl_boot.c
@@ -62,7 +62,7 @@ void board_init_f(ulong bootflag)
 	 * First we need to initialize the SDRAM, so that the real
 	 * U-Boot or the OS (Linux) can be loaded
 	 */
-	initdram(0);
+	initdram();
 
 	/* Clear bss */
 	memset(__bss_start, '\0', __bss_end - __bss_start);
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index cc30fa6e17..192634d41c 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -401,7 +401,7 @@ void mpc85xx_reginfo(void)
 #ifndef CONFIG_FSL_CORENET
 #if (defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)) && \
 	!defined(CONFIG_SYS_INIT_L2_ADDR)
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 #if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD) || \
 	defined(CONFIG_ARCH_QEMU_E500)
@@ -411,7 +411,7 @@ phys_size_t initdram(int board_type)
 #endif
 }
 #else /* CONFIG_SYS_RAMBOOT */
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	phys_size_t dram_size = 0;
 
diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
index 7202c3fc46..3b79efb246 100644
--- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c
@@ -414,7 +414,7 @@ static unsigned char spd_read(uchar chip, uint addr)
  *		 banks appropriately. If Auto Memory Configuration is
  *		 not used, it is assumed that no DIMM is plugged
  *-----------------------------------------------------------------------------*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	unsigned char iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
 	unsigned long dimm_populated[MAXDIMMS] = {SDRAM_NONE, SDRAM_NONE};
@@ -2855,7 +2855,7 @@ static void test(void)
  *		time parameters.
  * 		Configures the PPC405EX(r) and PPC460EX/GT
  *---------------------------------------------------------------------------*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	unsigned long val;
 
diff --git a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
index 455136c68c..3b072b7791 100644
--- a/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c
@@ -998,7 +998,7 @@ static void program_ddr0_44(unsigned long dimm_ranks[],
  *		 banks appropriately. If Auto Memory Configuration is
  *		 not used, it is assumed that no DIMM is plugged
  *-----------------------------------------------------------------------------*/
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	unsigned char const iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
 	unsigned long dimm_ranks[MAXDIMMS];
diff --git a/arch/powerpc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c
index cd63456e70..2d805717a7 100644
--- a/arch/powerpc/cpu/ppc4xx/sdram.c
+++ b/arch/powerpc/cpu/ppc4xx/sdram.c
@@ -148,7 +148,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)
 /*
  * Autodetect onboard SDRAM on 405 platforms
  */
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	ulong speed;
 	ulong sdtr1;
@@ -349,7 +349,7 @@ static void sdram_tr1_set(int ram_address, int* tr1_value)
  *	 so this should be extended for other future boards
  *	 using this routine!
  */
-phys_size_t initdram(int board_type)
+phys_size_t initdram(void)
 {
 	int i;
 	int tr1_bank1;
diff --git a/arch/powerpc/cpu/ppc4xx/spl_boot.c b/arch/powerpc/cpu/ppc4xx/spl_boot.c
index 318f23b646..f3aa46c4f1 100644
--- a/arch/powerpc/cpu/ppc4xx/spl_boot.c
+++ b/arch/powerpc/cpu/ppc4xx/spl_boot.c
@@ -26,7 +26,7 @@ void board_init_f(ulong bootflag)
 	 * First we need to initialize the SDRAM, so that the real
 	 * U-Boot or the OS (Linux) can be loaded
 	 */
-	initdram(0);
+	initdram();
 
 	/* Clear bss */
 	memset(__bss_start, '\0', __bss_end - __bss_start);