diff options
| author | Tom Rini <trini@konsulko.com> | 2018-09-16 10:29:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-09-16 10:29:39 -0400 |
| commit | 589cf349f0e0b06117b52525e9dcaf5e8ab42e9c (patch) | |
| tree | c7ae337cd694acf74d7dfe171ee83ec0d388f2b4 /arch | |
| parent | 2976d3c1504960d3934a7404b0648edc28b52eb9 (diff) | |
| parent | e83da8e8809ccd3872270f4247fe76c1f75c1a92 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-sh
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/sh/include/asm/config.h | 9 | ||||
| -rw-r--r-- | arch/sh/include/asm/cpu_sh7724.h | 3 | ||||
| -rw-r--r-- | arch/sh/lib/time.c | 45 |
3 files changed, 22 insertions, 35 deletions
diff --git a/arch/sh/include/asm/config.h b/arch/sh/include/asm/config.h index bad0026648..d2862df4a5 100644 --- a/arch/sh/include/asm/config.h +++ b/arch/sh/include/asm/config.h @@ -6,4 +6,13 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ +#if !defined(CONFIG_CPU_SH2) +#include <asm/processor.h> + +/* Timer */ +#define CONFIG_SYS_TIMER_COUNTS_DOWN +#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */ +#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4) +#endif + #endif diff --git a/arch/sh/include/asm/cpu_sh7724.h b/arch/sh/include/asm/cpu_sh7724.h index 7a81e1677e..7b217959ed 100644 --- a/arch/sh/include/asm/cpu_sh7724.h +++ b/arch/sh/include/asm/cpu_sh7724.h @@ -203,9 +203,6 @@ #define PYDR 0xA405016A #define PZDR 0xA405016C -/* Ether */ -#define EDMR 0xA4600000 - /* UBC */ /* H-UDI */ diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c index eb642969aa..fb317f95d5 100644 --- a/arch/sh/lib/time.c +++ b/arch/sh/lib/time.c @@ -13,44 +13,25 @@ #include <common.h> #include <asm/processor.h> #include <asm/io.h> -#include <sh_tmu.h> -#define TCR_TPSC 0x07 +#if defined(CONFIG_CPU_SH3) +#define TSTR 0x2 +#define TCR0 0xc +#endif /* CONFIG_CPU_SH3 */ -static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; +#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE) +#define TSTR 0x4 +#define TCR0 0x10 +#endif /* CONFIG_CPU_SH4 */ -unsigned long get_tbclk(void) -{ - u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; - return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2); -} - -unsigned long timer_read_counter(void) -{ - return ~readl(&tmu->tcnt0); -} - -static void tmu_timer_start(unsigned int timer) -{ - if (timer > 2) - return; - writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr); -} - -static void tmu_timer_stop(unsigned int timer) -{ - if (timer > 2) - return; - writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr); -} +#define TCR_TPSC 0x07 +#define TSTR_STR0 BIT(0) int timer_init(void) { - u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; - writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0); - - tmu_timer_stop(0); - tmu_timer_start(0); + writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0); + writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR); + writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR); return 0; } |