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authorTom Rini <trini@konsulko.com>2020-04-15 12:10:51 -0400
committerTom Rini <trini@konsulko.com>2020-04-15 12:10:51 -0400
commit66b8669d7709cecedf2e0403bb17b48bab86f644 (patch)
treeaf87667da9a26f1ab9a4ff80ee5be459636e51c6 /arch
parent9cb3ce2558ba1fc058dfb26a07fc02603773a211 (diff)
parent71ba2cb0d678d2c29dadd5fcca61ce3942876ee6 (diff)
Merge tag 'u-boot-stm32-20200415' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Replace STM32MP1_TRUSTED by TFABOOT flag - Enable bootd, iminfo, imxtract on ST defconfig - Rename LEDs to match silkscreen on AV96 - Add KS8851-16MLL ethernet on FMC2 - Define FMC2 base address - net: dwc_eth_qos: implement reset-gpios for stm32 - net: dwc_eth_qos: implement phy reg and max-speed for stm32
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/dts/stm32mp157a-avenger96.dts6
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi68
-rw-r--r--arch/arm/mach-stm32mp/Kconfig21
-rw-r--r--arch/arm/mach-stm32mp/bsec.c18
-rw-r--r--arch/arm/mach-stm32mp/cpu.c10
-rw-r--r--arch/arm/mach-stm32mp/include/mach/stm32.h1
7 files changed, 93 insertions, 32 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index bbb1e2738b..dd41090fc6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1586,6 +1586,7 @@ config ARCH_STI
config ARCH_STM32MP
bool "Support STMicroelectronics STM32MP Socs with cortex A"
select ARCH_MISC_INIT
+ select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
select CLK
select DM
diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts
index f577d79afb..11e7e6367d 100644
--- a/arch/arm/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/dts/stm32mp157a-avenger96.dts
@@ -38,21 +38,21 @@
led {
compatible = "gpio-leds";
led1 {
- label = "green:user1";
+ label = "green:user0";
gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led2 {
- label = "green:user2";
+ label = "green:user1";
gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led3 {
- label = "green:user3";
+ label = "green:user2";
gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 62c45def43..b57f3d520c 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -37,6 +37,12 @@
default-state = "on";
};
};
+
+ /* This is actually on FMC2, but we do not have bus driver for that */
+ ksz8851: ks8851mll@64000000 {
+ compatible = "micrel,ks8851-mll";
+ reg = <0x64000000 0x20000>;
+ };
};
&i2c4 {
@@ -50,6 +56,68 @@
};
};
+&pinctrl {
+ /* These should bound to FMC2 bus driver, but we do not have one */
+ pinctrl-0 = <&fmc_pins_b>;
+ pinctrl-1 = <&fmc_sleep_pins_b>;
+ pinctrl-names = "default", "sleep";
+
+ fmc_pins_b: fmc-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
+ <STM32_PINMUX('D', 5, AF12)>, /* FMC_NWE */
+ <STM32_PINMUX('B', 7, AF12)>, /* FMC_NL */
+ <STM32_PINMUX('D', 14, AF12)>, /* FMC_D0 */
+ <STM32_PINMUX('D', 15, AF12)>, /* FMC_D1 */
+ <STM32_PINMUX('D', 0, AF12)>, /* FMC_D2 */
+ <STM32_PINMUX('D', 1, AF12)>, /* FMC_D3 */
+ <STM32_PINMUX('E', 7, AF12)>, /* FMC_D4 */
+ <STM32_PINMUX('E', 8, AF12)>, /* FMC_D5 */
+ <STM32_PINMUX('E', 9, AF12)>, /* FMC_D6 */
+ <STM32_PINMUX('E', 10, AF12)>, /* FMC_D7 */
+ <STM32_PINMUX('E', 11, AF12)>, /* FMC_D8 */
+ <STM32_PINMUX('E', 12, AF12)>, /* FMC_D9 */
+ <STM32_PINMUX('E', 13, AF12)>, /* FMC_D10 */
+ <STM32_PINMUX('E', 14, AF12)>, /* FMC_D11 */
+ <STM32_PINMUX('E', 15, AF12)>, /* FMC_D12 */
+ <STM32_PINMUX('D', 8, AF12)>, /* FMC_D13 */
+ <STM32_PINMUX('D', 9, AF12)>, /* FMC_D14 */
+ <STM32_PINMUX('D', 10, AF12)>, /* FMC_D15 */
+ <STM32_PINMUX('G', 9, AF12)>, /* FMC_NE2_FMC_NCE */
+ <STM32_PINMUX('G', 12, AF12)>; /* FMC_NE4 */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ };
+
+ fmc_sleep_pins_b: fmc-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
+ <STM32_PINMUX('D', 5, ANALOG)>, /* FMC_NWE */
+ <STM32_PINMUX('B', 7, ANALOG)>, /* FMC_NL */
+ <STM32_PINMUX('D', 14, ANALOG)>, /* FMC_D0 */
+ <STM32_PINMUX('D', 15, ANALOG)>, /* FMC_D1 */
+ <STM32_PINMUX('D', 0, ANALOG)>, /* FMC_D2 */
+ <STM32_PINMUX('D', 1, ANALOG)>, /* FMC_D3 */
+ <STM32_PINMUX('E', 7, ANALOG)>, /* FMC_D4 */
+ <STM32_PINMUX('E', 8, ANALOG)>, /* FMC_D5 */
+ <STM32_PINMUX('E', 9, ANALOG)>, /* FMC_D6 */
+ <STM32_PINMUX('E', 10, ANALOG)>, /* FMC_D7 */
+ <STM32_PINMUX('E', 11, ANALOG)>, /* FMC_D8 */
+ <STM32_PINMUX('E', 12, ANALOG)>, /* FMC_D9 */
+ <STM32_PINMUX('E', 13, ANALOG)>, /* FMC_D10 */
+ <STM32_PINMUX('E', 14, ANALOG)>, /* FMC_D11 */
+ <STM32_PINMUX('E', 15, ANALOG)>, /* FMC_D12 */
+ <STM32_PINMUX('D', 8, ANALOG)>, /* FMC_D13 */
+ <STM32_PINMUX('D', 9, ANALOG)>, /* FMC_D14 */
+ <STM32_PINMUX('D', 10, ANALOG)>, /* FMC_D15 */
+ <STM32_PINMUX('G', 9, ANALOG)>, /* FMC_NE2_FMC_NCE */
+ <STM32_PINMUX('G', 12, ANALOG)>; /* FMC_NE4 */
+ };
+ };
+};
+
&pmic {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 96153693a7..7b86ce1612 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -35,9 +35,10 @@ config ENV_SIZE
config STM32MP15x
bool "Support STMicroelectronics STM32MP15x Soc"
- select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
+ select ARCH_SUPPORT_PSCI if !TFABOOT
+ select ARM_SMCCC if TFABOOT
select CPU_V7A
- select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
+ select CPU_V7_HAS_NONSEC if !TFABOOT
select CPU_V7_HAS_VIRT
select OF_BOARD_SETUP
select PINCTRL_STM32
@@ -45,8 +46,8 @@ config STM32MP15x
select STM32_RESET
select STM32_SERIAL
select SYS_ARCH_TIMER
- imply SYSRESET_PSCI if STM32MP1_TRUSTED
- imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
+ imply SYSRESET_PSCI if TFABOOT
+ imply SYSRESET_SYSCON if !TFABOOT
help
support of STMicroelectronics SOC STM32MP15x family
STM32MP157, STM32MP153 or STM32MP151
@@ -83,19 +84,9 @@ config TARGET_DH_STM32MP1_PDK2
endchoice
-config STM32MP1_TRUSTED
- bool "Support trusted boot with TF-A"
- default y if !SPL
- select ARM_SMCCC
- help
- Say Y here to enable boot with TF-A
- Trusted boot chain is :
- BootRom => TF-A.stm32 (clock & DDR) => U-Boot.stm32
- TF-A monitor provides proprietary SMC to manage secure devices
-
config STM32MP1_OPTEE
bool "Support trusted boot with TF-A and OP-TEE"
- depends on STM32MP1_TRUSTED
+ depends on TFABOOT
default n
help
Say Y here to enable boot with TF-A and OP-TEE
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 3b923f088e..0d5850b4a9 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -68,7 +68,7 @@ static bool bsec_read_lock(u32 address, u32 otp)
return !!(readl(address + bank) & bit);
}
-#ifndef CONFIG_STM32MP1_TRUSTED
+#ifndef CONFIG_TFABOOT
/**
* bsec_check_error() - Check status of one otp
* @base: base address of bsec IP
@@ -273,7 +273,7 @@ static int bsec_program_otp(long base, u32 val, u32 otp)
return ret;
}
-#endif /* CONFIG_STM32MP1_TRUSTED */
+#endif /* CONFIG_TFABOOT */
/* BSEC MISC driver *******************************************************/
struct stm32mp_bsec_platdata {
@@ -282,7 +282,7 @@ struct stm32mp_bsec_platdata {
static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
{
-#ifdef CONFIG_STM32MP1_TRUSTED
+#ifdef CONFIG_TFABOOT
return stm32_smc(STM32_SMC_BSEC,
STM32_SMC_READ_OTP,
otp, 0, val);
@@ -313,7 +313,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp)
static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp)
{
-#ifdef CONFIG_STM32MP1_TRUSTED
+#ifdef CONFIG_TFABOOT
return stm32_smc(STM32_SMC_BSEC,
STM32_SMC_READ_SHADOW,
otp, 0, val);
@@ -336,7 +336,7 @@ static int stm32mp_bsec_read_lock(struct udevice *dev, u32 *val, u32 otp)
static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
{
-#ifdef CONFIG_STM32MP1_TRUSTED
+#ifdef CONFIG_TFABOOT
return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_PROG_OTP,
otp, val);
@@ -349,7 +349,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp)
static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
{
-#ifdef CONFIG_STM32MP1_TRUSTED
+#ifdef CONFIG_TFABOOT
return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_WRITE_SHADOW,
otp, val);
@@ -362,7 +362,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp)
{
-#ifdef CONFIG_STM32MP1_TRUSTED
+#ifdef CONFIG_TFABOOT
if (val == 1)
return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_WRLOCK_OTP,
@@ -473,7 +473,7 @@ static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev)
return 0;
}
-#ifndef CONFIG_STM32MP1_TRUSTED
+#ifndef CONFIG_TFABOOT
static int stm32mp_bsec_probe(struct udevice *dev)
{
int otp;
@@ -500,7 +500,7 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
.ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata),
.ops = &stm32mp_bsec_ops,
-#ifndef CONFIG_STM32MP1_TRUSTED
+#ifndef CONFIG_TFABOOT
.probe = stm32mp_bsec_probe,
#endif
};
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 9aa5794334..74d03fa7dd 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -76,7 +76,7 @@
#define PKG_MASK GENMASK(2, 0)
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
-#ifndef CONFIG_STM32MP1_TRUSTED
+#ifndef CONFIG_TFABOOT
static void security_init(void)
{
/* Disable the backup domain write protection */
@@ -136,7 +136,7 @@ static void security_init(void)
writel(BIT(0), RCC_MP_AHB5ENSETR);
writel(0x0, GPIOZ_SECCFGR);
}
-#endif /* CONFIG_STM32MP1_TRUSTED */
+#endif /* CONFIG_TFABOOT */
/*
* Debug init
@@ -150,7 +150,7 @@ static void dbgmcu_init(void)
}
#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
-#if !defined(CONFIG_STM32MP1_TRUSTED) && \
+#if !defined(CONFIG_TFABOOT) && \
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
/* get bootmode from ROM code boot context: saved in TAMP register */
static void update_bootmode(void)
@@ -198,7 +198,7 @@ int arch_cpu_init(void)
#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
dbgmcu_init();
-#ifndef CONFIG_STM32MP1_TRUSTED
+#ifndef CONFIG_TFABOOT
security_init();
update_bootmode();
#endif
@@ -214,7 +214,7 @@ int arch_cpu_init(void)
if ((boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
#if defined(CONFIG_DEBUG_UART) && \
- !defined(CONFIG_STM32MP1_TRUSTED) && \
+ !defined(CONFIG_TFABOOT) && \
(!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
else
debug_uart_init();
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 6daf9f7121..76d593d785 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -13,6 +13,7 @@
#define STM32_RCC_BASE 0x50000000
#define STM32_PWR_BASE 0x50001000
#define STM32_DBGMCU_BASE 0x50081000
+#define STM32_FMC2_BASE 0x58002000
#define STM32_TZC_BASE 0x5C006000
#define STM32_ETZPC_BASE 0x5C007000
#define STM32_STGEN_BASE 0x5C008000