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authorDinh Nguyen <dinguyen@kernel.org>2018-04-04 17:18:22 -0500
committerMarek Vasut <marex@denx.de>2018-04-17 11:39:49 +0200
commit67e4436e8856449a9ee27c44a09bf7d333caa95c (patch)
tree29106318f3640a4f02552c97a2ba6f6daeb4b53c /arch
parent2878942aa22ae2effd128bb0ada9c81b25bb048b (diff)
arm: dts: socfpga: enables i2c0 in socfpga_de0_nano
Add all the appropriate i2c alias in the base socfpga dtsi and enables the i2c node on the DE0 NANO board. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/dts/socfpga.dtsi4
-rw-r--r--arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts12
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index 7557aa01e5..f34dd9db97 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -14,6 +14,10 @@
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
serial0 = &uart0;
serial1 = &uart1;
timer0 = &timer0;
diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
index dc09bed901..5e7fe2aa5f 100644
--- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
+++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
@@ -56,6 +56,18 @@
status = "okay";
};
+&i2c0 {
+ status = "okay";
+
+ dxl345: adxl345@0 {
+ compatible = "adi,adxl345";
+ reg = <0x53>;
+
+ interrupt-parent = <&portc>;
+ interrupts = <3 2>;
+ };
+};
+
&mmc0 {
status = "okay";
u-boot,dm-pre-reloc;